As the semiconductor devices keeps scaling down in size, three-dimensional multi-gate structures, such as the fin-type field effect transistors (FinFETs), have been developed to replace planar Complementary Metal Oxide Semiconductor (CMOS) devices. A structural feature of the FinFET is the silicon-based fin that extends upright from the surface of the substrate, and the gate wrapping around the conducting channel that is formed by the fin further provides a better electrical control over the channel.
For the gate replacement process of the FinFETs, dummy gate strips are replaced by sequentially formed metal gates. Before the gate replacement process is performed, wet cleaning processes are performed and peeling issue of dummy gate strips resulted from the aforesaid wet cleaning processes may induce low yield rate.